Taiwan Semiconductor Manufacturing Company Limited TSM

Key data

The business

TSMC makes chips it does not design. Apple, Nvidia, AMD, Qualcomm and the hyperscalers hand over blueprints; TSMC turns them into silicon in its Taiwan fabs and ships the wafers back. It is the contract factory for the digital economy, and at the leading edge it is close to the only one. Intel stumbled on manufacturing and Samsung's foundry trails on yield, so when a design needs the smallest, fastest, most power-efficient transistors, it comes here. That is the moat: not a patent but a decade's lead in process technology, plus the trust that TSMC will never compete with its own customers by designing chips of its own.

The economics follow from that scarcity. The newest node commands the highest price and the customer funds much of the build, so as 3-nanometer and now 2-nanometer ramp, revenue and margin climb together. In the June quarter the leading edge did exactly that.

The numbers

Earnings have beaten consensus every quarter for the last year, but the size of the ramp is the story, not the beat.

Quarterly earnings per share rose 48% in a year, and Q2 2026 was the inflection: revenue of $40.2B, up 34% from a year earlier and 12% sequentially, gross margin of 67.7% above the top of guidance, and net profit up 77% year on year. The margin beat matters because TSMC almost always clears its own gross-margin guide; beating the high end of the range signals pricing power, not luck.

The five-year arc is a 16% revenue and 18% earnings compounding rate, with one down year in 2023 when the PC and phone cycle turned. The last row shows the AI acceleration on top of it: first-half 2026 net income of $40.5B already exceeds all of 2024, and half-year earnings per share of $7.80 is close to last year's full total. This is not a company returning to trend, it is one stepping above it.

The lens for a foundry is which nodes carry the revenue, because the leading edge is where the pricing and the moat live.

The 2-nanometer ramp that was the open question last time is on track: it reached 3% of wafer revenue in its first quarters of volume, while 3- and 5-nanometer together are two-thirds of the mix, and three-quarters of all revenue now comes from advanced nodes almost no rival can make at scale. The variant here is modest. The market knows AI drives this, but it is discounting durability, pricing TSMC as though today's 68% margin is a peak rather than a new floor set by 2-nanometer pricing. The print that settles it is 2026 gross margin holding near 68% as 2-nanometer scales.

Management

The company runs a disciplined shop, and the record is in the guidance: gross margin has cleared the guided range quarter after quarter, Q2's 67.7% landing above a 65.5% to 67.5% guide. Capital allocation is the tension. TSMC spends enormously, roughly 35% of revenue on capex, which is why free-cash-flow yield sits under 2% despite the profits. That is the price of the moat: the lead is bought with concrete and EUV machines every year. Insiders bought token amounts over the past year, 75 small director purchases against essentially no selling, plan status not disclosed; for a $2.2 trillion company it signals nothing beyond the absence of a rush for the exits.

How it fails or surprises you

Taiwan concentration (left tail). Nearly all leading-edge capacity sits on one island 100 miles from China. A blockade or invasion is unlikely in any given year but permanent if it happens: the fabs, the engineers and the customer ties cannot be moved quickly. Arizona and Japan shrink the tail slowly, over years, not quarters. This is the exposure no earnings print resolves.

Customer in-sourcing. The hyperscalers designing their own chips still need TSMC to build them, but if Intel Foundry finally yields at the leading edge, or a top-three customer dual-sources, both volume and pricing soften. Watch for any large customer publicly qualifying a second foundry on an advanced node.

The 2-nanometer super-cycle (right tail). If 2-nanometer ramps faster and at richer prices than modeled, on AI accelerators and premium phones through 2027, revenue and margin both surprise upward and the peak-margin fear inverts. The tell is 2-nanometer moving from 3% toward double digits of wafer revenue within a few quarters while gross margin holds above 68%.

Closing thoughts

The payoff is asymmetric around one seam. Strip out the Taiwan tail and this is a high-quality compounder priced at the top of its range but growing faster than at any point in that range, with a right tail in 2-nanometer the market treats as already spent. Keep the Taiwan tail in and the distribution has a small chance of near-total loss stapled to an otherwise attractive spread. The fatter everyday tail is upward, on 2-nanometer and AI demand; the fatter catastrophic tail is geopolitical, and no financial statement will warn you before it arrives. If the downside linchpin breaks, most of the capital is at risk; if the upside lands, this is a business earning well above today's estimates by 2027.

The bet is still that the world needs more advanced chips and only TSMC can make them at scale, and that its customers keep paying for the privilege. What breaks it is either a second source finally qualifying at the leading edge or a Taiwan Strait event, and the one pair of numbers that tells you first is 2-nanometer's share of wafer revenue climbing while gross margin holds near 68%. If that margin cracks toward 60% as 2-nanometer scales, the pricing-power story was wrong.